#ifndef __MCP2510_H #define __MCP2510_H #define RXF0SIDH 0x00 // Acceptance Filter 0 Standard Identifier High #define RXF0SIDL 0x01 // Acceptance Filter 0 Standard Identifier Low #define RXF0EID8 0x02 // Acceptance Filter 0 Extended Identifier High #define RXF0EID0 0x03 // Acceptance Filter 0 Extended Identifier Low #define RXF1SIDH 0x04 // Acceptance Filter 1 Standard Identifier High #define RXF1SIDL 0x05 // Acceptance Filter 1 Standard Identifier Low #define RXF1EID8 0x06 // Acceptance Filter 1 Extended Identifier High #define RXF1EID0 0x07 // Acceptance Filter 1 Extended Identifier Low #define RXF2SIDH 0x08 // Acceptance Filter 2 Standard Identifier High #define RXF2SIDL 0x09 // Acceptance Filter 2 Standard Identifier Low #define RXF2EID8 0x0A // Acceptance Filter 2 Extended Identifier High #define RXF2EID0 0x0B // Acceptance Filter 2 Extended Identifier Low #define BFPCTRL 0x0C // RXnBF Pin Control and Status Register #define TXRTSCTRL 0x0D // TXnRTS Pin Control and Status Register #define CANSTAT 0x0E // CAN Status Register #define CANCTRL 0x0F // CAN Control Register #define RXF3SIDH 0x10 // Acceptance Filter 3 Standard Identifier High #define RXF3SIDL 0x11 // Acceptance Filter 3 Standard Identifier Low #define RXF3EID8 0x12 // Acceptance Filter 3 Extended Identifier High #define RXF3EID0 0x13 // Acceptance Filter 3 Extended Identifier Low #define RXF4SIDH 0x14 // Acceptance Filter 4 Standard Identifier High #define RXF4SIDL 0x15 // Acceptance Filter 4 Standard Identifier Low #define RXF4EID8 0x16 // Acceptance Filter 4 Extended Identifier High #define RXF4EID0 0x17 // Acceptance Filter 4 Extended Identifier Low #define RXF5SIDH 0x18 // Acceptance Filter 5 Standard Identifier High #define RXF5SIDL 0x19 // Acceptance Filter 5 Standard Identifier Low #define RXF5EID8 0x1A // Acceptance Filter 5 Extended Identifier High #define RXF5EID0 0x1B // Acceptance Filter 5 Extended Identifier Low #define TEC 0x1C // Transmitter error counter #define REC 0x1D // Reciever error counter #define RXM0SIDH 0x20 // Acceptance Mask 0 Standard Identifier High #define RXM0SIDL 0x21 // Acceptance Mask 0 Standard Identifier Low #define RXM0EID8 0x22 // Acceptance Mask 0 Extended Identifier High #define RXM0EID0 0x23 // Acceptance Mask 0 Extended Identifier Low #define RXM1SIDH 0x24 // Acceptance Mask 1 Standard Identifier High #define RXM1SIDL 0x25 // Acceptance Mask 1 Standard Identifier Low #define RXM1EID8 0x26 // Acceptance Mask 1 Extended Identifier High #define RXM1EID0 0x27 // Acceptance Mask 1 Extended Identifier Low #define CNF3 0x28 // Configuration Register 3 #define CNF2 0x29 // Configuration Register 2 #define CNF1 0x2A // Configuration Register 1 #define CANINTE 0x2B // Interrupt Enable Register #define CANINTF 0x2C // Interrupt Flag Register #define EFLG 0x2D // Error flag register #define TXB0CTRL 0x30 // Transmit Buffer 0 Control Register #define TXB0SIDH 0x31 // Transmit Buffer 0 Standard Identifier High #define TXB0SIDL 0x32 // Transmit Buffer 0 Standard Identifier Low #define TXB0EID8 0x33 // Transmit Buffer 0 Extended Identifier High #define TXB0EID0 0x34 // Transmit Buffer 0 Extended Identifier Low #define TXB0DLC 0x35 // Transmit Buffer 0 Data Length Code #define TXB0D0 0x36 // Transmit Buffer 0 Data Byte 0 #define TXB0D1 0x37 // Transmit Buffer 0 Data Byte 1 #define TXB0D2 0x38 // Transmit Buffer 0 Data Byte 2 #define TXB0D3 0x39 // Transmit Buffer 0 Data Byte 3 #define TXB0D4 0x3A // Transmit Buffer 0 Data Byte 4 #define TXB0D5 0x3B // Transmit Buffer 0 Data Byte 5 #define TXB0D6 0x3C // Transmit Buffer 0 Data Byte 6 #define TXB0D7 0x3D // Transmit Buffer 0 Data Byte 7 #define TXB1CTRL 0x40 // Transmit Buffer 1 Control Register #define TXB1SIDH 0x41 // Transmit Buffer 1 Standard Identifier High #define TXB1SIDL 0x42 // Transmit Buffer 1 Standard Identifier Low #define TXB1EID8 0x43 // Transmit Buffer 1 Extended Identifier High #define TXB1EID0 0x44 // Transmit Buffer 1 Extended Identifier Low #define TXB1DLC 0x45 // Transmit Buffer 1 Data Length Code #define TXB1D0 0x46 // Transmit Buffer 1 Data Byte 0 #define TXB1D1 0x47 // Transmit Buffer 1 Data Byte 1 #define TXB1D2 0x48 // Transmit Buffer 1 Data Byte 2 #define TXB1D3 0x49 // Transmit Buffer 1 Data Byte 3 #define TXB1D4 0x4A // Transmit Buffer 1 Data Byte 4 #define TXB1D5 0x4B // Transmit Buffer 1 Data Byte 5 #define TXB1D6 0x4C // Transmit Buffer 1 Data Byte 6 #define TXB1D7 0x4D // Transmit Buffer 1 Data Byte 7 #define TXB2CTRL 0x50 // Transmit Buffer 2 Control Register #define TXB2SIDH 0x51 // Transmit Buffer 2 Standard Identifier High #define TXB2SIDL 0x52 // Transmit Buffer 2 Standard Identifier Low #define TXB2EID8 0x53 // Transmit Buffer 2 Extended Identifier High #define TXB2EID0 0x54 // Transmit Buffer 2 Extended Identifier Low #define TXB2DLC 0x55 // Transmit Buffer 2 Data Length Code #define TXB2D0 0x56 // Transmit Buffer 2 Data Byte 0 #define TXB2D1 0x57 // Transmit Buffer 2 Data Byte 1 #define TXB2D2 0x58 // Transmit Buffer 2 Data Byte 2 #define TXB2D3 0x59 // Transmit Buffer 2 Data Byte 3 #define TXB2D4 0x5A // Transmit Buffer 2 Data Byte 4 #define TXB2D5 0x5B // Transmit Buffer 2 Data Byte 5 #define TXB2D6 0x5C // Transmit Buffer 2 Data Byte 6 #define TXB2D7 0x5D // Transmit Buffer 2 Data Byte 7 #define RXB0CTRL 0x60 // Recieve Buffer 0 Control Register #define RXB0SIDH 0x61 // Recieve Buffer 0 Standard Identifier High #define RXB0SIDL 0x62 // Recieve Buffer 0 Standard Identifier Low #define RXB0EID8 0x63 // Recieve Buffer 0 Extended Identifier High #define RXB0EID0 0x64 // Recieve Buffer 0 Extended Identifier Low #define RXB0DLC 0x65 // Recieve Buffer 0 Data Length Code #define RXB0D0 0x66 // Recieve Buffer 0 Data Byte 0 #define RXB0D1 0x67 // Recieve Buffer 0 Data Byte 1 #define RXB0D2 0x68 // Recieve Buffer 0 Data Byte 2 #define RXB0D3 0x69 // Recieve Buffer 0 Data Byte 3 #define RXB0D4 0x6A // Recieve Buffer 0 Data Byte 4 #define RXB0D5 0x6B // Recieve Buffer 0 Data Byte 5 #define RXB0D6 0x6C // Recieve Buffer 0 Data Byte 6 #define RXB0D7 0x6D // Recieve Buffer 0 Data Byte 7 #define RXB1CTRL 0x70 // Recieve Buffer 1 Control Register #define RXB1SIDH 0x71 // Recieve Buffer 1 Standard Identifier High #define RXB1SIDL 0x72 // Recieve Buffer 1 Standard Identifier Low #define RXB1EID8 0x73 // Recieve Buffer 1 Extended Identifier High #define RXB1EID0 0x74 // Recieve Buffer 1 Extended Identifier Low #define RXB1DLC 0x75 // Recieve Buffer 1 Data Length Code #define RXB1D0 0x76 // Recieve Buffer 1 Data Byte 0 #define RXB1D1 0x77 // Recieve Buffer 1 Data Byte 1 #define RXB1D2 0x78 // Recieve Buffer 1 Data Byte 2 #define RXB1D3 0x79 // Recieve Buffer 1 Data Byte 3 #define RXB1D4 0x7A // Recieve Buffer 1 Data Byte 4 #define RXB1D5 0x7B // Recieve Buffer 1 Data Byte 5 #define RXB1D6 0x7C // Recieve Buffer 1 Data Byte 6 #define RXB1D7 0x7D // Recieve Buffer 1 Data Byte 7 #define SJW4TQ 3 #define SJW3TQ 2 #define SJW2TQ 1 #define SJW1TQ 0 #define CMD_READ 0x03 // Read Command #define CMD_WRITE 0x02 // Write Command #define CMD_BITMODIFY 0x05 // Bit-modify Command #define CMD_READSTATUS 0xA0 // Read Status Command (poll) #define CMD_RESET 0xC0 // Reset Command #define CMD_RTS 0x80 #define RTS0 0x81 // Request-to-send Commands #define RTS1 0x82 #define RTS2 0x84 #define MCP2510_CS_LOW() P5OUT &= ~0x01 #define MCP2510_CS_HI() P5OUT |= 0x01 void MCP2510_SPI_Init(void); void MCP2510_WRITE(unsigned char addr, unsigned char data); void MCP2510_Write_Ex(unsigned char addr, unsigned char *data, unsigned char nbytes); unsigned char MCP2510_READ(unsigned char addr); void MCP2510_Read_Ex(unsigned char addr, unsigned char *data, unsigned char nbytes); unsigned char MCP2510_STATUS(void); void MCP2510_Reset(void); void MCP2510_RTS(unsigned char); void MCP2510_Bit_Modify(unsigned char MASK, unsigned char addr, unsigned char data); #endif